Error: operand 0 must be FPSCR --'vmsr fpexc, r0'

Description

Due to a problem in SoC Embedded Design Suite, this error may be seen during ARM DS-5 Altera Edition compilation when vmsr fpexc, r0 is used in .s assembly code.

Resolution

To workaround this problem, download the latest Mentor Sourcery CodeBench Lite package from www.Mentor.com and update the gcc compiler in <Quartus II Installation>/embedded/host_tools/mentor/gnu/arm/baremetal.

This problem is fixed starting with release 15.1 of SoC Embedded Design Suite.