Knowledge Base Article

Error: Channel PLL Parameter 'output_clock_frequency' is set to an illegal value of '<Channel PLL output frequency> MHz' and PMA Direct parameter is set to 'false'.

Description

You may encounter the above Quartus® II fitter error if you use the Cyclone® V Custom PHY with a transceiver speed grade of -6 and a core speed grade of -7 in Quartus® II software version 13.0. This is due to an incorrectly mapped transceiver speed grade.

Resolution

To work around this problem, you should upgrade to Quartus® II software version 13.0sp1.

Updated 2 months ago
Version 2.0
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