Error (24312): Intel Quartus Prime software detected that the pin placement in bank 3B_T has violated the Byte I/O Standard rule. Reassign pin location assignment according to the following user guides to comply with the restrictions.

Description

The error message shown below will be seen during the fitter compilation stage when using the Quartus® Prime Pro Edition Software version 24.1 when no location assignments have been implemented in the Design Example generated from the Agilex™ 5 MIPI D-PHY FPGA IP.

 

Error (24312): Quartus Prime software detected that the pin placement in bank 3B_T has violated the Byte I/O Standard rule. Reassign pin location assignment according to the following user guides to comply with the restrictions.

Info (24313): For MIPI design, review "Using the Remaining I/O Pin from Same Byte Location" as outlined in the Agilex™ 5 FPGA MIPI D-PHY IP User Guide.

               

 

Resolution

To workaround this problem, provide a location assignment to at least one of the Agilex™ 5 MIPI D-PHY FPGA IP pins in the Design Example.