Error (20834) When you enable the CvP setting, you must ensure the design is CvP capable.

Description

When compiling a design targeting a Stratix® 10 FPGA device in Quartus® Prime Pro Edition Software starting from version 19.3 and above, you may get the error message stated above.

Resolution

If you do not intend to perform CvP in your design, remove the following in QSF setting:

set_global_assignment -name CVP_MODE "CORE INITIALIZATION AND UPDATE"