Knowledge Base Article

Error (19169): Transfer between periphery and DSP or RAM will make timing transfer impossible.

Description

This error is expected for Intel® Stratix® 10. This is because the Intel® Stratix®10 device only supports transfer to and from the periphery using a core Flip-Flop (FF) and look-up table (LUT).

Resolution

The workaround is to add the FF or LUT between the periphery.

Updated 3 months ago
Version 2.0
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