Error (10170): Verilog HDL syntax error at &ltNios II Gen 2 file name&gt.v near text "="; expecting "("

Description

Due to a problem in the Quartus® II version 15.0 and earlier, you may see this error during elaboration of a design containing the Nios® II Gen 2 Processor. This error occurs when the instruction master has not been connected to a RAM. This means the Nios II Gen 2 Processor cannot run any software.

Resolution

To work around his problem, ensure the instruction master is connected to a RAM.

In a future release of the Quartus II software, Qsys will issue an error message during generation.