Knowledge Base Article

DDR2 Interfaces Using Soft Memory Controller May Not Close Timing When Targeting Arria V or Cyclone V Devices

Description

This problem affects DDR2 and LPDDR2 products.

Interfaces using the soft memory controller may fail to close timing on Arria V and Cyclone V devices.

Resolution

The workaround for this issue is to use a different fitter seed.

This issue will be fixed in a future version.

Updated 3 months ago
Version 3.0
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