Cyclone V Hard IP for PCI Express IP Core VHDL Model Might Not Simulate Successfully with ModelSim-Altera Simulator

Description

If you generate a VHDL simulation model for a Cyclone V Hard IP for PCI Express IP core Gen2 x4 endpoint variation, you cannot simulate your IP core successfully with the ModelSim-Altera simulator.

Resolution

This issue has no workaround. You must use a Verilog HDL simulation model for this IP core variation, or simulate with a different simulation tool.