Knowledge Base Article
Critical Warning (21688): The total mutual inductance (Lm) of 1.0 V I/O < pin location > with surrounding 1.0 V I/O pins is < total mutual inductance value > nH. This is not allowed. The total mutual inductance must be less than or equal to < value
Description
You might receive this error when you place pins surrounding 1.0 V I/O standard pins within the same bank, despite meeting the total mutual inductance requirement based on the mutual coupling spreadsheet for the MAX® 10 FPGA. This is a known problem due to the outdated database for the Quartus® Prime Software and the spreadsheet.
Resolution
This problem is fixed in the Quartus® Prime Pro Software version 22.1.
Updated 3 months ago
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