Control of RapidIO II IP Core EF_PTR Fields is Incorrect

Description

The RapidIO II MegaCore Function User Guide states that the Extended features pointer parameter in the RapidIO II parameter editor controls the final EF_PTR in the chain of pointers from one register block to another in the IP core. This feature allows the user to specify additional user-defined register blocks in user logic and to add them to the end of the chain. If the IP core variation implements the Error Management Extensions, the parameter controls the EF_PTR field of the Error Management Extensions Block Header register at offset 0x300, and if the IP core variation does not implement the Error Management Extensions, the parameter controls the EF_PTR field of the LP-Serial Lane Register Block Header register at offset 0x200.

However, this feature is not implemented correctly. If the Error Management Extensions are not implemented, the IP core nevertheless sets the EF_PTR field of the LP-Serial Lane Register Block Header register to what would be the offset to the Error Management Extensions Block Header register, 0x300, regardless of the value of the Extended features pointer parameter.

This issue affects only variations that do not implement the Error Management Extensions. In these variations, you cannot specify the address of a user-defined register block in the expected location, the EF_PTR field of the LP-Serial Lane Register Block Header register.

Resolution

To avoid this issue, ensure that software does not rely on the value in the EF_PTR field of the LP-Serial Lane Register Block Header register in any RapidIO II IP core variation that does not implement the Error Management Extensions block.

This issue is fixed in version 13.1 of the RapidIO II MegaCore function. The Extended features pointer parameter is now available in the Command and Status Registers tab instead of the Capability Registers tab.