Cannot Export Some Interfaces in Qsys-Generated RapidIO IP Core

Description

If you create a Qsys system with a RapidIO MegaCore function, export any of the RapidIO MegaCore function interfaces io_read_slave, io_write_slave, io_read_master, io_write_master, or mnt_master, and then set Create testbench Qsys system to Standard, BFMs for standard Avalon interfaces, the Qsys system cannot generate. Error messages of the following form appear:

Error: test_rapid_tb.test_rapid_inst_rapidio_0_io_read_master_bfm.s0: Slave with readdatavalid signal must support at least 1 pending read

Error: test_rapid_tb.test_rapid_inst_rapidio_0_io_write_slave_bfm.m0: Has read but no readdata signal

Error: test_rapid_tb.test_rapid_inst_rapidio_0_io_read_slave_bfm.m0: Has write but no writedata signal

Error: test_rapid_tb.test_rapid_inst_rapidio_0_mnt_master_bfm.s0: Slave with readdatavalid signal must support at least 1 pending read

This issue affects all Qsys-generated RapidIO MegaCore function variations.

Resolution

To avoid this issue, if you want to create a Qsys testbench for your Qsys system, do not export any of the RapidIO interfaces io_read_slave, io_write_slave, io_read_master, io_write_master, or mnt_master.

This issue is fixed in version 12.1 of the RapidIO MegaCore function.