Can LPDDR5 External Memory Interfaces (EMIF) IP support single VDD2 rail mode in Agilex™ 5 FPGA and Agilex™ 7 FPGA M‑Series devices?

Description

No. LPDDR5 External Memory Interfaces (EMIF) IP in Agilex™ 5 FPGA and Agilex™ 7 FPGA M‑Series devices only supports dual VDD2 rail mode.

Resolution

You need to separate VDD2 power at memory device as follows.

VDD2H = 1.05V

VDD2L = 0.9V