40-100GbE IP Core User Guide Describes IPG_DEL_PERIOD Register Incorrectly

Description

The 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide describes the 40-100GbE IP core IPG_DEL_PERIOD register at offset 0x126 incorrectly.

The user guide states that if bits [11:0] of the register hold the value N, the MAC deletes extra Idle bytes from the inter-packet gap (IPG) Idle sequence in the ratio of one Idle byte for every (8 x N) 8-byte blocks. This information is incorrect.

In fact, if the value in the register is N, the MAC deletes extra Idle bytes for the IPG in the ratio of one Idle byte for every N 8-byte blocks.

Resolution

To work around this issue, ensure you set the value in the IPG_DEL_PERIOD register based on the corrected definition in this erratum.

This issue is fixed in version 14.1 of the 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide.