Knowledge Base Article

13.0 Quartus II NativeLink simulation fails for Stratix V devices when Generate Value Change Dump (VCD) is selected

Description

In the 13.0 Quartus® II software release, NativeLink simulation for Stratix® V devices does not allow Value Change Dump (VCD), but this option is selectable under the EDA Tool Settings > Simulation window. If you select Generate Value Change Dump (VCD) file script and Compile test bench, NativeLink generates a .do file with the extension <*>_run_msim_gate_verilog.do. This file contains <*>_dump_all_vcd_nodes.tcl which causes the simulation to fail. There is no error or warning message to report the error.

Resolution

This issue is fixed in the 13.0 Quartus® II software release service pack 1.

To compile your design, do not select Generate Value Change Dump (VCD) file script, or remove the <*>_dump_all_vcd_nodes.tcl file from <*>_run_msim_gate_verilog.do.

Updated 2 months ago
Version 2.0
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