Knowledge Base Article
10GBASE-R PHY Setup Time Violation in Arria V GZ Devices with 1588
Description
The 10GBASE-R PHY IP Core has a hold time violation in the Arria V Ethernet MAC example design. This timing violation occurs for the fast model.
Resolution
This issue is fixed in version 13.0 of the Quartus II software.
Updated 3 months ago
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