Knowledge Base Article

// Error: <design file>:29:20: "A_WE_StdLogicVector" invalid expression.

Description

Due to a problem in the Quartus® II software version 11.0 SP1 and later, the <proj rev>.ctc script file created for Cadence Encounter Conformal Logical Equivalency Check (LEC) software is missing a line to include the file altera_europa_support_lib.vhd. This missing line may cause the above error.

Resolution

To work around this problem, add the following option line to the read_design command in your <proj rev>.ctc script file.

- map altera /libraries/vhdl/altera \
Updated 3 months ago
Version 2.0
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