Forum Discussion
Occasional ContributorLWH2F Throughput
Occasional ContributorHi Nigel,
We had a meeting with Altera. They said, they are able to reproduce the issue, even with the "final silicon"/"production silicon" revision. At the time of our meeting, they didn't know the root cause of the issue but said a fix would likely require the modification of the chip design and another silicon revision. This would take time and whether it will be fixed at all remains to be discussed.
Alteras recommended approach for a high throughput use case is to use the FPGA-to-SDRAM bridge and implement a DMA in the FPGA that pulls the data from the SDRAM. Altera provides example code for this approach. I haven't tested it.
We have implemented a workaround, so for us the issue is solved. Still, it would be great to have a proper fix.
Kind Regards,
Eric Opitz
New ContributorHi Eric,
thanks for the update. A fix would be good but I also don't hold out much hope in the short to medium term. It does seem odd that a problem with such basic functionality was missed, but it is what it is.
Thanks again,
Nigel
