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RH0001's avatar
RH0001
Icon for Occasional Contributor rankOccasional Contributor
7 years ago
Solved

Modelsim design size limit buggy and or misleading in Quartus Lite 19.1

Hi, I am trying to simulate a small design totaling just 1025 lines of VHDL including the Megawizard parts & test bench YET Modelsim prints a warning

# ** Warning: Design size of 17912 statements exceeds ModelSim-Intel FPGA Starter Edition recommended capacity.

# Expect performance to be adversely affected.

And goes into totally slugged mode making itself unusable.

Why is there such a large discrepancy between the actual size of the design and that claimed by modelsim ? Is this a bug ?

The Megawizard parts are a PLL and two small block rams, the rest of the code consists of a top module joining two lower level modules, then of course there is a small test bench.

Has anybody else experienced this problem ?

4 Replies

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    7 years ago

    Hi RH,

    It is not a bug.

    ModelSim-Intel FPGA Starter Edition Software has 10,000 executable line limitations.

    The number of line count included all the design files, IP & libraries.

    Solution

    1. Optimize your design by emove your Megawizard Ip
    2. Use ModelSim-Intel FPGA Edition Software.

    .

    Regards

    Anand

  • RH0001's avatar
    RH0001
    Icon for Occasional Contributor rankOccasional Contributor
    7 years ago

    Hi Anand

    Thank you for your answer, I understood the limit did not include all the pre-compiled libraries of which there are a huge collection.

    Is there a way for me to remove the libraries for all the chips I am not using (about 90%) ?

    Regards

    RH

  • RH0001's avatar
    RH0001
    Icon for Occasional Contributor rankOccasional Contributor
    7 years ago

    OK many thanks for your help, it's like 20 years ago, just leave a simulation running all night haha