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Altera_Forum
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16 years ago

High Speed I/O pin Locking

Hello, I am trying to port a design on Arria II GX FPGA. I want to use the high speed I/O pins that this FPGA has. However using Quartus II v9.0 I am unable to do so. Whenever I try to lock any...
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Altera_Forum
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16 years ago

Hi Anirban,

While I don't work on this part of Quartus II myself, I asked someone who does, and he said the QL0 pins are only useable when attached to a transceiver - in other words, you can't use them for regular IO.

I would suggest you read over the Arria II GX handbook section on IOs, available at http://www.altera.com/literature/hb/arria-ii-gx/aiigx_5v1_02.pdf. Hopefully that will help resolve your issues.

Cheers,

Adrian Ludwin

Altera Corp.