Hi, I'm trying to get handle with the SPI on a Nios II Core but I don't get it. I have a SPI master and a SPI Slave that I can try to transmit some data from the master to the slave. I connected them with the "loopback board". My Code is: //Write some data to the Slave IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SPI_SLAVE_BASE,0x04); //Check the TRDY bit if data is written(TRDY=0 means it is writing and //TRDY=1 again means the data was written) trdyNumber=(IORD_ALTERA_AVALON_SPI_STATUS(SPI_SLAVE_BASE)& ALTERA_AVALON_SPI_STATUS_TRDY_MSK)>>6; //Read from the register int data=(IORD_ALTERA_AVALON_SPI_RXDATA(SPI_SLAVE_BASE)&0xFF); printf("%d",data); I also read the manuel for the SPI Core but it doesn't work. Can somebody help my with an exsample or give me an advice? Regards

Your code contains several mistakes: IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SPI_SLAVE_BASE,0x04) This doesn't write data to the slave, but it selects (enables) slave whose address is 4 for receiving data SPI slave is not supposed to transmit data autonomously. It sends data upon reception of a master request. You both send and receive data on slave. I think you meant send with master and receive with slave.

First thanks! And yes I want to send some data from Master to Slave but how? Thats what I don't understand precicely. May you can bring light in the dark.

The correct procedure is something like this: // select slave (not required in single slave system) IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(master_base, n_slave); // assert CS IOWR_ALTERA_AVALON_SPI_CONTROL(master_base, ALTERA_AVALON_SPI_CONTROL_SSO_MSK); // wait tx channel ready do { status = IORD_ALTERA_AVALON_SPI_STATUS(master_base); } while (((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0) && (status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) == 0); // (optional) data possibly to be transmitted back from slave to master upon request IOWR_ALTERA_AVALON_SPI_TXDATA(slave_base, data_answer); // tx data IOWR_ALTERA_AVALON_SPI_TXDATA(master_base, data_tx); // this will initiate the transfer; in the same time the slave sends out on miso pin // the data ready in its tx register // Wait until the interface has finished transmitting do { status = IORD_ALTERA_AVALON_SPI_STATUS(master_base); } while ((status & ALTERA_AVALON_SPI_STATUS_TMT_MSK) == 0); // release CS IOWR_ALTERA_AVALON_SPI_CONTROL(master_base, 0); // read received data from slave data_rx = IORD_ALTERA_AVALON_SPI_RXDATA(slave_base); // data_rx must match data_tx // (optional) read answer from master recvd_answer = IORD_ALTERA_AVALON_SPI_RXDATA(master_base); // recvd_answer must match data_answer Please note that I wrote this code by heart. I'm not sure this it will compile without errors.

Thanks again! I just tried your code and it is compileable but it doesen't work complitly correct. The Code looks like: --- Quote Start --- int status=0; int countTMT; // select slave (not required in single slave system) IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SPI_MASTER_BASE, SPI_SLAVE_BASE); // assert CS IOWR_ALTERA_AVALON_SPI_CONTROL(SPI_MASTER_BASE, ALTERA_AVALON_SPI_CONTROL_SSO_MSK); // wait tx channel ready do { status = IORD_ALTERA_AVALON_SPI_STATUS(SPI_MASTER_BASE); } while (((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0) && (status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) == 0); // (optional) data possibly to be transmitted back from slave to master upon request IOWR_ALTERA_AVALON_SPI_TXDATA(SPI_SLAVE_BASE, 0x01); // tx data IOWR_ALTERA_AVALON_SPI_TXDATA(SPI_MASTER_BASE, 0x10); // this will initiate the transfer; in the same time the slave sends out on miso pin // the data ready in its tx register // Wait until the interface has finished transmitting do{ status = IORD_ALTERA_AVALON_SPI_STATUS(SPI_MASTER_BASE); IOWR_ALTERA_AVALON_PIO_DATA(LED_PIO_BASE,countTMT & 0x01); usleep(50000); countTMT++; } while((status & ALTERA_AVALON_SPI_STATUS_TMT_MSK) == 0); // release CS IOWR_ALTERA_AVALON_SPI_CONTROL(SPI_MASTER_BASE, 0); // read received data from slave int data_rx = IORD_ALTERA_AVALON_SPI_RXDATA(SPI_SLAVE_BASE); // data_rx must match data_tx printf("Daten aus dem Slave:%d\n",data_rx); // (optional) read answer from master int recvd_answer = IORD_ALTERA_AVALON_SPI_RXDATA(SPI_MASTER_BASE); // recvd_answer must match data_answer printf("Daten aus dem Master:%d\n",recvd_answer); --- Quote End --- The result is: --- Quote Start --- Daten aus dem Slave:0 Daten aus dem Master:0 --- Quote End --- I don't understand why it doesn't work because it should. Maybe you can help me one more time. Thanks for your helt! Regards

I presume you already checked the loopback connections: - mosi output from master connected to mosi input pin to slave - miso output from slave connected to miso input to master - sclk from master feeds sclk slave input - slave select output from master drives ss input pin on slave What's your master sclk frequency? Can you test the mosi signal? Also check the status and control register on both master and slave, both before and after the execution of the above code. If you don't find anything wrong, post their values and I'll take a look. For similar spi example, you can also refer to the alt_avalon_spi_command() function in HAL driver library.

SPI Problems | Altera Community

22 Replies

Altera_Forum
Honored Contributor
12 years ago
--- Quote Start ---
I changed the waiting completion loop like you told me and it doesn't work. I also tried instead to wait on the TRDY-Flag to wait on the RRDY-Flag because how far I understand if the RRDY-Flag is "1" it is possible to read the register. But it also doesn't work.
I`m also checked the setup in QSYS of the both SPI Cores and till the difference that one is a master and the other one is a slave they have the same setting in relation to the clock polarity and phase. So may I change the setting for the slave or the master? Or what can I do farther?

Thanks in advance for your help!
--- Quote End ---

Did You find the solution to Your problem?
Altera_Forum
Honored Contributor
8 years ago
Hi siedler2011,
I'm facing the same problems that you've already faced. I'm implementing an SPI Slave Controller on my DE1-SOC Altera Board. My master is represented by a Microcontroller that should send data to DE1-SOC board. i'm obtaining the same values that you've obtained for the status register. "Statusregister of the Slave: 0x310".
I'm using this code to implement the slave SPI Controller on my board:
int main(void)
{
alt_u32 rddata=0x0;
alt_u32 status;
IOWR_ALTERA_AVALON_SPI_STATUS(SPI_BASE,0x0000);
IOWR_ALTERA_AVALON_SPI_TXDATA(SPI_BASE,0x1001);
IORD_ALTERA_AVALON_SPI_RXDATA(SPI_BASE);
while(1)
{
do
{
status = IORD_ALTERA_AVALON_SPI_STATUS(SPI_BASE);
}
while((status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK)==0 &&
(status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) == 0);
rddata= IORD_ALTERA_AVALON_SPI_RXDATA(SPI_BASE);

IOWR_ALTERA_AVALON_SPI_TXDATA(SPI_BASE, rddata);
}

Do you think it could work? I think i ve the same problems that you had with the SS_n signal. Could you help me ? Could you provide me code that you've used on your board set as SLAVE in the communication ?

Thanks

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SPI Problems

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