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Altera_Forum
Honored Contributor
14 years agoYour problem may be related to the SDRAM may be related to the use of the PLL.
It seems you must use a second un-skewed clock for the nios 2. i found this info on a site for a Cornell grad course - ECE 5760 Advanced Microcontroller Design and system-on-chip Fall 2011. Look at the GCC examples page for the info. Replace the Nios2 clk_50 input with the second? c1 output of the ALTPLL. I called the wire CPU_CLK. Now you can increase you program size with or without micrium or linux.