Memory corruption & DMA transfer

Hi everyone,

don&#39;t know if anyone has had experience on this kind of problem and can give me a pointer or not. Thanks in advance http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif .

I have a design I want to add onto the standard example (std1s10 from nios II stratix kit) as a new component inside SOPC builder. This hardware peripheral has two slave interface, one for the task logic and one for the memory built inside with the task logic.

(I want the task logic to be able to read data out from the memory block and do some processing while able to transfer data into the memory block through DMA, I am not pipelining the data transfer and processing )

The memory I declare through mega-wizard in Quartus is a true dual port memory. (cause I want to be able to read two data out at the same time, but to transfer the data into the memory, I am only using one set of address &data&write signal).

When I use dma to do data transferring, I found out the data transferred are somehow corrupted!.

Anyone know, how to setup the setup time or hold times for memory blocks?? I had this information in the compilation report of the system. OR might it be something else that&#39;s corrupting the data transferred to the destination?

I tested my dma transfer function between sdram and on-chip memory, it&#39;s fine, so I think it must be something wrong with my memory block in my component.

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Info: Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.[/b]

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Any help is appreciated

Thanks

Tony