Forum Discussion
Hi,
Please follow the guideline in the L- and H-Tile Transceiver PHY User Guide: https://docs.altera.com/r/docs/683621/current/l-and-h-tile-transceiver-phy-user-guide/pma-bonding
As I understand you need PMA only bonding of the channels. For this, you will need only one ATX pll clock to be driving all the channels.
Another important consideration you have to make, is the channel placements. As you need max 20G, you will need to use the GXT channels.

Hope this helps.
Regards
- Ash_R_Intel20 days ago
Regular Contributor
Yes, you understood it right.
As 20G can be achieved only by GXT channels and for the clocking at that speed ATX pll is the preferred choice. Refer section 3.1 PLLs of the same document.
Regards
- dncmrc114 days ago
New Contributor
Hi,
It looks like bonding is not supported at rates > 17.4G:
Also the ATX PLL refuses to configure for 20G with bonding:
Can you please help?
Regards
- CheepinC_altera6 days ago
Regular Contributor
Hi,
Thank you for filing this case and sharing the details. I appreciate your patience. Please allow me some time to review the information, and I’ll get back to you as soon as possible.