VMR001
New Contributor
6 years agoSimulation of EMIF example design not moving forward
I have generated an example design and tried to simulate the design (the scripts were generated by quartus pro tool) using Modelsim-Intel FPGA edition, It has been running for 1+ hour, I am not seeing init_done or calibration pass/fail status. I am attaching the snapshot of the transcript (copied and pasted whatever was available on transcript window). Please help me fix the issue
Quartus pro 19.4
Target Device 1SD280PT2F55E2VGS1
Shared snapshot of selected DDR4 IP gen