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ArtfulWombat's avatar
ArtfulWombat
Icon for New Contributor rankNew Contributor
2 years ago

Agilex 7 M EMIF Mode Register Access

I'm interested in performing Mode Register Reads (MRR) and Mode Register Writes (MRW) when using the Agilex 7 M EMIF with DDR5 memory connected to the FPGA (not HPS). I looked through the command mai...
Memory
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi @ArtfulWombat ,

Since there is no further question from your end, I will transfer this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts.

Otherwise, the community users will continue to help you on this thread.

Thank you.