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HBhat2's avatar
HBhat2
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5 years ago

Two LRDIMM (Dual-Rank or Quad rank) support in Arria 10 GX 570 Device

Hi, I am targeting GX 570 device for custom hardware development. There is a need for 2 independent DDR4 controllers as we are planning to use 2 LRDIMM (Dual or Quad ranks) with Arria 10 GX 570. ...
HBhat2's avatar
HBhat2
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5 years ago

Hi,

Thanks for the suggestion with Interface planner.

I found the problem.

As we are placing the EMIF controller in a common I/O column, Need to use same PLL reference clock & reset to both the controllers.

Also, I am using Quartus 18.1 version & it has a known issue as mentioned in the below link.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/emif/2019/error-13149---emif-phylite-systems-sharing-a-pll-reference-clock.html
After using same clock for both the controller's PLL ref clk input & applying the work around I am able to complete the fitter & able to get the pin out from Quartus. It is mapping the pin outs to IO banks from 3A to 3H.

With regards,

HPB