PLL error - help please

Hi,

I am using EP3C25F256. I need to synchronize an internal 30MHz clock with an external 10MHz clock. In order to do so I'm using a PLL which will multiply the 10MHz input by 3 thus resulting with a 30MHz clock which will be used instead of the current 30MHz clock. By doing this I assume that the 10MHz and 30MHz clocks will be synchronized (correct me if I'm wrong). I'm using a dedicated CLK pin as the PLL input. When I compile the code, i get the following error:

Error: Clock input port inclk[0] of PLL "pll_mf:pll|altpll:altpll_component|pll_mf_altpll:auto_generated|pll1" must be driven by a non-inverted input pin or another PLL, optionally through a Clock Control block

Info: Input port INCLK[0] of node "pll_mf:pll|altpll:altpll_component|pll_mf_altpll:auto_generated|pll1" is not connected

How can I fix it?

Thanks in advance.