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Altera_Forum
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16 years ago

Initialzing Registers in altera FPGA's

I have a very basic questions about initializing registers in altera FPGA's.

If i want to initialize a register to a binary 1 in simulation i would define it the following way.

reg var=1'b1;

I was under the impression that this only worked in simulations until recently when I saw in actual hardware this also worked. My questions is will this always work in hardware, 100% of the time, when the FPGA comes up?

My application is as follows, i use a hardware I/O from an FPGA as a reset line for a device, it's an active low reset. When the FPGA is re-programmed I do not want this line to be pulled low by the FPGA. This will cause my device to go into reset which I cannot have. On my Circuit board I have this line pulled up with a 10k resistor. When the FPGA is being programmed all I/O's go to inputs, and this 10K resistor will hold this line high. Once the FPGA is programmed and comes out of reset i need this I/O to be a binary 1 right from the start. I can never have it go to 0.

Will defining the reg as shown above give me this functionality. If not is there another way to have the FPGA do what I want. I know i can fix this in hardware but am hoping the FPGA can do it for me. I am using a cyclone III FPGA for my current project

Thanks for your help

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Please read the section entitled "Register Power-Up Values in Altera Devices" beginning on page 6-36 of the "Design Guidelines" for Quartus II:

    http://www.altera.com/literature/hb/qts/qts_qii5v1_02.pdf

    In short, yes this will work for Quartus II integrated synthesis but it may not work in other synthesis tools.

    As far as your design goes, what you are doing is just fine and I don't think you'll have any problems. In fact, you probably don't even need the external resistor because of the FPGA's internal pull-ups. If you wanted to be even safer, you could:

    1 - Make the pin open-drain in your Quartus project.

    2 - Make the pin bidirectional and use your register as an output enable instead of driving the pin directly:

    reg var = 1'b0;

    assign reset_pin_out = var ? 1'b0 : 1'bz;

    This allows you to initialize the register to zero which is more likely to be supported across synthesis tools.

    But again, what you're doing is probably fine.

    Jake