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StefanoMarsi's avatar
StefanoMarsi
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

CYCLONE V - HPS and I2C Peripheral Pin

Hi Community I'm testing the I2C interface embedded in CycloneV - HPS. - However, if I export peripherals signals through the HPS I/O Set everything works pretty well. - But If I switch to FPG...
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tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Stefano

From the waveform that you shared, we could see that the signals are distorted when it is routed through the FPGA.

Have you tried not passing the i2c signals through the tri-state buffer?

Could you also try setting the I/O standard to Open Drain as suggested in the CycloneV interface guideline?

Please refer to this link on the i2c guidline placement.

https://www.intel.com/content/www/us/en/docs/programmable/683360/18-0/i2c-interface-design-guidelines.html

Regards

Jingyang, Teh

StefanoMarsi's avatar
StefanoMarsi
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

This is exactly what I did!

Please note the implementation in the attached code!