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ost's avatar
ost
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5 years ago

stream_in memory type

Back in the days of hls compiler version 17.1, the "stream_in" class seemed to materialize into block mem fifos, while the later compiler versions tries to [also] utilize MLAB memory (Arria10). Is ...
SyafieqS's avatar
SyafieqS
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5 years ago

Hi Morten,


I assume that you are trying to use the ihc::buffer<> parameter with their design, please tell me if this is incorrect.

There is currently no way to force HLS to choose a different FIFO technology for the stream_in FIFO buffer, however you may create a FIFO using IP catalog and place that in front of your HLS component using Platform Designer


ost's avatar
ost
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5 years ago

Thanks for looking into this. Im hoping this will arrive in a future version. Apparently there was a change after 17.1 version and I can't find the details on this.

After 17.1, I get non functional RTL when implementing a 608bit wide, 64 deep stream, wich seems to be implemented in MLABs only. My "area analysis" report lists a few of "Memory with unknown name (address space xx)" that seems to behave wrong.

ALUTs FFs RAMs MLABs DSPs Details
Memory with unknown name (address space 64) 0 0 0 32 0 Stall-free,\n76B requested,\n128B implemented.
Memory with unknown name (address space 65) 0 0 0 12 0 Stall-free,\n76B requested,\n128B implemented.
Memory with unknown name (address space 67) 0 0 0 26 0 Stall-free,\n76B requested,\n128B implemented.
Stream 'prq_prep_pullstream' 15 30 0 1 0 608b wide with 64 elements.