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attdoner's avatar
attdoner
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2 years ago

OFS : Data Path of QSFP from HE_HSSI

Hi Team,

I am using N6001 with Intel OFS (OFS PCIe Attach) . I wanted to test data transfer from Host1 to Host2 as below.
Host1 -> N6001(Port0) -> OtherNIC(Port0) -> Host2.
Is there any sample application available in OPAE/OFS which performs this transaction? Can you please suggest.

In addition to above query, I wants to know how HE-HSSI sends data to QSFP?. The hssi application shows "No eth interface, so not honoring --eth-loopback". ( https://ofs.github.io/ofs-2024.1-1/hw/n6001/user_guides/ug_qs_ofs_n6001/ug_qs_ofs_n6001/ Section 7. Send traffic through the 10G AFU). Does this mean the HE_HSSI will not communicate with E-Tile or QSFPs (FIM) ?

Do I need to enable any parameters to pass over QSFPs?

Thankyou.

44 Replies

    • attdoner's avatar
      attdoner
      Icon for New Contributor rankNew Contributor

      Hi @JohnT_Intel ,
      Can you provide the programming log of 100g. I want to cross verify the method of programming, to check whether I missed out any steps. I was not able to get the above log prints in 100g. Instead it used to get mbox_write

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi,


    I do not have issue on clearing the HSSI STAT from my side.


    Below is my logging.


    pggae@pggae-PowerEdge-R740:~$ sudo hssistats

    Namespace(pcie_address=None, clear=False)

    sbdf: 0000:d8:00.0

    FPGA dev: {'segment': 0, 'bus': 216, 'dev': 0, 'func': 0, 'path': '/sys/class/fpga_region/region0', 'pcie_address': '0000:d8:00.0'}

    args.hssi_grps[('dfl_dev.3', ['/sys/bus/pci/devices/0000:d8:00.0/fpga_region/region0/dfl-fme.0/dfl_dev.3/uio/uio0'], '0000:d8:00.0', 21)]

    fpga uio dev:dfl_dev.3


    --------HSSI INFO START-------

    DFH :0x3000000010002015

    HSSI ID :0x15

    DFHv :0.5

    guidl :0x99a078ad18418b9d

    guidh :0x4118a7cbd9db4a9b

    HSSI version :1.0

    Firmware Version :1

    HSSI num ports :2

    Port0 :100GCAUI-4

    Port4 :100GCAUI-4

    --------HSSI INFO END-------


    HSSI num ports: 2

    HSSI Ports | port:0| port:4|



    tx_packets | 102| 0|

    rx_packets | 0| 102|

    rx_crc_errors | 0| 0|

    rx_align_errors | 0| 0|

    tx_payload_bytes | 7646| 0|

    rx_payload_bytes | 0| 7646|

    tx_pause | 0| 0|

    rx_pause | 0| 0|

    rx_errors | 0| 0|

    tx_errors | 0| 0|

    rx_unicast | 0| 102|

    rx_multicast | 0| 0|

    rx_broadcast | 0| 0|

    tx_discards | 0| 0|

    tx_unicast | 102| 0|

    tx_multicast | 0| 0|

    tx_broadcast | 0| 0|

    ether_drops | 0| 0|

    rx_total_bytes | 0| 7826|

    rx_total_packets | 0| 102|

    rx_undersize | 0| 0|

    rx_oversize | 0| 92|

    rx_64_bytes | 0| 1|

    rx_65_127_bytes | 0| 1|

    rx_128_255_bytes | 0| 1|

    rx_256_511_bytes | 0| 0|

    rx_512_1023_bytes | 0| 3|

    rx_1024_1518_bytes | 0| 4|

    rx_gte_1519_bytes | 0| 0|

    rx_jabbers | 0| 0|

    rx_runts | 0| 0|

    pggae@pggae-PowerEdge-R740:~$ sudo hssistats clear

    usage: hssistats [-h] [--pcie-address PCIE_ADDRESS] [--clear]

    hssistats: error: unrecognized arguments: clear

    pggae@pggae-PowerEdge-R740:~$ sudo hssistats --clear

    Namespace(pcie_address=None, clear=True)

    sbdf: 0000:d8:00.0

    FPGA dev: {'segment': 0, 'bus': 216, 'dev': 0, 'func': 0, 'path': '/sys/class/fpga_region/region0', 'pcie_address': '0000:d8:00.0'}

    args.hssi_grps[('dfl_dev.3', ['/sys/bus/pci/devices/0000:d8:00.0/fpga_region/region0/dfl-fme.0/dfl_dev.3/uio/uio0'], '0000:d8:00.0', 21)]

    fpga uio dev:dfl_dev.3


    --------HSSI INFO START-------

    DFH :0x3000000010002015

    HSSI ID :0x15

    DFHv :0.5

    guidl :0x99a078ad18418b9d

    guidh :0x4118a7cbd9db4a9b

    HSSI version :1.0

    Firmware Version :1

    HSSI num ports :2

    Port0 :100GCAUI-4

    Port4 :100GCAUI-4

    --------HSSI INFO END-------


    HSSI num ports: 2

    HSSI stats clearing ...

    HSSI stats cleared

    pggae@pggae-PowerEdge-R740:~$ sudo hssistats

    Namespace(pcie_address=None, clear=False)

    sbdf: 0000:d8:00.0

    FPGA dev: {'segment': 0, 'bus': 216, 'dev': 0, 'func': 0, 'path': '/sys/class/fpga_region/region0', 'pcie_address': '0000:d8:00.0'}

    args.hssi_grps[('dfl_dev.3', ['/sys/bus/pci/devices/0000:d8:00.0/fpga_region/region0/dfl-fme.0/dfl_dev.3/uio/uio0'], '0000:d8:00.0', 21)]

    fpga uio dev:dfl_dev.3


    --------HSSI INFO START-------

    DFH :0x3000000010002015

    HSSI ID :0x15

    DFHv :0.5

    guidl :0x99a078ad18418b9d

    guidh :0x4118a7cbd9db4a9b

    HSSI version :1.0

    Firmware Version :1

    HSSI num ports :2

    Port0 :100GCAUI-4

    Port4 :100GCAUI-4

    --------HSSI INFO END-------


    HSSI num ports: 2

    HSSI Ports | port:0| port:4|



    tx_packets | 0| 0|

    rx_packets | 0| 0|

    rx_crc_errors | 0| 0|

    rx_align_errors | 0| 0|

    tx_payload_bytes | 0| 0|

    rx_payload_bytes | 0| 0|

    tx_pause | 0| 0|

    rx_pause | 0| 0|

    rx_errors | 0| 0|

    tx_errors | 0| 0|

    rx_unicast | 0| 0|

    rx_multicast | 0| 0|

    rx_broadcast | 0| 0|

    tx_discards | 0| 0|

    tx_unicast | 0| 0|

    tx_multicast | 0| 0|

    tx_broadcast | 0| 0|

    ether_drops | 0| 0|

    rx_total_bytes | 0| 0|

    rx_total_packets | 0| 0|

    rx_undersize | 0| 0|

    rx_oversize | 0| 0|

    rx_64_bytes | 0| 0|

    rx_65_127_bytes | 0| 0|

    rx_128_255_bytes | 0| 0|

    rx_256_511_bytes | 0| 0|

    rx_512_1023_bytes | 0| 0|

    rx_1024_1518_bytes | 0| 0|

    rx_gte_1519_bytes | 0| 0|

    rx_jabbers | 0| 0|

    rx_runts | 0| 0|