Forum Discussion

DdRd's avatar
DdRd
Icon for New Contributor rankNew Contributor
1 year ago
Solved

AN 754: MIPI D-PHY Solution with Cyclone V - questions on VCCIO/VCCDP/VREF connection

I am referring to the AN 754 (MIPI D-PHY Solution with Passive Resistor Networks in Intel® Low-Cost FPGAs) to acheive MIPI receive in Cyclone IV. We can see in the document at Table 1, in FPGA I/O b...
Acceleration
High-level Design Tools
  • DdRd's avatar
    DdRd
    1 year ago

    Hi Aqid,

    The AN754 refers to the Cyclone® IV, Cyclone V, Intel® Cyclone 10 LP, Intel MAX® 10.

    But sorry for the typo, I am referring specicially to the Cyclone V.

    Thanks for the approval, so it should be okay to connect with the requirement in 1/2/3:

    1) VCCIO=2.5V

    2) VCCPD=2.5V

    3) VREF=0.6V

    Regarding the VTT, I will follow the AN754 at Figure 1 (FPGA Unidirectional Receiver Implementation Block Diagram) or at Figure 3 (FPGA As Receiver HS-RX and LP-RX Modes IBIS Simulation Circuit) that is not using VTT at all.

    THANKS A LOT FOR THE SUPPORT - I appreaciate a lot!!!


    Regards,
    David R.

AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hello David,


Thanks for the clarification.

I am happy to help you!


I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.